Shielding Clock Signals
Clock circuits generate digital circuit pulses at regular intervals, which are critical to circuit performance. Clock circuitry is especially sensitive to noise and crosstalk because clock signals must be clean for the circuitry to perform its function. The high clock speeds needed in many military/aerospace designs require properly managing board-level design, layout and signal interconnects. High-speed switching can produce electromagnetic waves that generate resonance, power/ground bounce, simultaneous switching noise, reflections and coupling between traces and power/ground planes.
Properly shielding clock circuitry is critical as a major step in reducing EMI/RFI (Figure 2). This is achieved by maintaining an adequate amount of spacing between traces once clock circuitry has been routed. The “three width (3W) rule” is applicable here. For example, if a clock signal is 5 mils wide, then it should be separated from corresponding traces and signals by 15 mils.
Clock circuitry is the most critical section in a mixed-signal PCB. When these signals must run through noisy analog circuitry because those paths cannot be avoided, ground shielding must be performed to protect clock signal traces or critical digital signals. It is best to run a clock net and use a ground trace to shield the clock trace’s entire path.
Proper Component Placement
Two component placement techniques are normally used to reduce EMI/RFI effects. One technique ensures that the noise-generating components are isolated from those components that generate less noise and are highly sensitive to EMI/RFI. For example, a high-speed crystal with high signal spikes must be isolated from sensitive clock signals. These components operate at different frequencies, creating different waveforms. Hence, the closer together they are, the more noise and crosstalk will be generated and amplified. Noise-generating components should thus be separated at a specified distance from others on the PCB.
Correct component placement is also vital for mixed-signal and digital PCB design. High-power, high-current analog circuits inherently create noise, which can adversely affect adjoining low-power, low-current digital circuits if proper partitioning between the two is not correctly implemented.
An example of effective partitioning places power supplies, analog interface converters and other analog circuits on the left side of the board, while high- and low-frequency digital components are placed on the right side; the system clock is in the middle and connectors are located at the board’s edge. In this way, analog and digital components are totally separated and traces can easily be routed separately.
Signals transmitted underneath analog and digital components must also be clean and well segregated. An internal plane layer underneath the trace layers may be bifurcated so that power and ground layers are split for proper signal transmission (Figure 3). This technique reduces EMI effects and suppresses noise.
Ideally, the analog section must be totally isolated in terms of placement, routing and plane separation. Analog traces should run only underneath their analog reference power or ground plane. Conversely, digital traces should run under the digital section with respective power and ground planes. Impedance is thus kept constant, and there is a good return signal path.
Using Radius Bends and Blind/Buried Vias
When routing RF circuits, it is important to avoid the extreme bends at 45° angles that many digital designers rely on to conserve routing space. These angles hinder proper propagation to high-frequency performance, causing impedance mismatches. Using arcs instead of sharp angles eliminates this problem.
A high-frequency effect created by this conventional PCB layout practice is return loss reflection, which cancels an incoming signal due to out-of-phase reflections. This problem can be resolved by using mitered corners or a radius bend to change the trace’s direction.
Blind vias, as the name implies, go from an external layer—such as the component or solder side of the board—to one of the internal planes, whereas buried vias go from one internal layer to another internal layer. |
