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EDA: PCBs Are Not So Simple Anymore

Printed-circuit boards (PCBs) are at the heart of the modern electronic packaging found in almost every consumer electronics product. In essence, a PCB creates the connections between components within a system.

Mass reproducibility for circuits with even a modicum of complexity and/or speed requires a PCBbased packaging scheme. When designed correctly, PCBs bring predictability. A correct design minimizes wiring lengths and lays out the board so signal- integrity issues are controlled. It also makes it much easier to find components during troubleshooting and repair. Even high-pin-count ICs can be removed, if necessary, and replaced.

Up to about 10 years ago, advanced PCB design technologies like microvias, high-density interconnects (HDIs), embedded passives, and high-pin-count FPGAs were available primarily to power users in global organizations designing bleeding-edge products. But these design technologies are rapidly entering the mainstream, making them challenges for a broader spectrum of PCB designers than ever before.

Today’s PCB Design Environment Most of today’s PCBs are pushing if not exceed-ing the limits of classic board design (Fig. 1). In mobile telecom, interconnect and board dimensions are shrinking rapidly, while designs are using fewer but more complex components with higher pin counts. At the same time, boards for networking and computer applications are
growing, with more interconnect and ground plane layers.

Data rates of up to 10 Gbits/s are resetting frequency standards for ICs. As IC vendors replace parallel bus architectures with serial asynchronous architectures (Third Generation
I/O or “3GIO”), challenges such as jitter, lossy lines, and bit error rates are replacing delay, timing, crosstalk, overshoot, and other traditional high-speed design challenges. In other words, it’s no longer reliable or viable to follow “rules of thumb” in today’s high-speed routing and verification.

The relatively new 3GIO technology uses standards for encoding and decoding electrical signals in serial asynchronous architectures. Already, Intel Corp. has incorporated 3GIO
technology into its PCI Express standardization environment. A significant percentage of today’s PCBs are currently operating in a frequency range of 1 to 10 GHz.

From a PCB design perspective, most of today’s high-speed design tools lack the advanced modeling and verification requirements utilized by 3GIO technology. With the onset of serial asynchronous architectures, these tools must further accommodate new design concepts
for routing highly constrained differential pairs (Fig. 2).

Understanding current and future PCB design challenges in all areas of PCB design (from highspeed design, FPGA-on-board integration, team design, and PCB fabrication, design, and interconnect to library, constraint, and data management) is a critical aspect of a company’s investment in a PCB design solution. This pullout looks at each of these challenges.

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