Suppressing interfaces between circuit zones
Each conductor that passes from one zone to another may need to be fitted with filters or other suppression devices such as opto-isolators, transformers, transient protection, etc.
This is especially true of the interconnections between the ‘inside world’ and the ‘outside world’.
Filters or other suppressers must be located at zone boundaries.
Using 0V and power planes
A PCB plane is a solid sheet of copper, not a fill or a mesh. Fills are useless for  EMC but meshes can have some benefit. However, planes produce wonderful results and modern digital processors rely totally on them for signal integrity as well as needing them for EMC.
Through-hole plated (THP) PCBs perforate the planes at every via and component lead, and it is important that the planes ‘web’ between the clearance holes, to avoid the creation of larger gaps and slots where the clearance holes merge with each other.
High-density interconnect PCB technology (sometimes called microvia or build-up technology) allows the use of vias that do not penetrate all the way through a PCB, allowing the planes to perform much better at frequencies above 100MHz.
Effective decoupling
Inductance in the power distribution of a PCB makes it impossible to deliver the fast pulses of current required by digital devices. Local capacitance is therefore required to store enough charge for their ICs’ short-term demands. These ‘decoupling capacitors’ also ensure that the high-frequency noise currents caused by digital device power demands are restricted to small areas of the power distribution, to minimise emissions.
Decoupling has another function, which is to prevent external interference from entering the power pins of analogue and digital ICs. Once inside an IC, RF signals might interfere directly with signals that share their frequency range, or might become demodulated and cause the d.c. bias of the internal circuits to shift, interfering with the functioning of the IC and/or producing unwanted ‘baseband’ noise.
The routing of the decouplers is very important, to minimise inductance and improve their frequency response. Adjacent 0V and power planes in a PCB’s layer ‘stack-up’ can be used to provide a distributed decoupling capacitor with an RF performance that is much better than any discrete capacitors.
Very small spacings between 0V-power plane pairs is also an increasing necessity, to provide more decoupling capacitance with better VHF performance. Spacings of less than 0.05mm (0.002 inches) are now being used in some applications.
Transmission Lines
Resonant interconnections make very efficient ‘unintentional antennas’ near their resonant frequencies, creating big problems for both emissions and immunity. Transmission line techniques can be applied to all types of conductors, such as cables, as well as to the copper traces on a PCB, to prevent them from resonating, and thus improve the emissions and immunity of their circuits.
By matching the impedance of a signal’s source and/or load to the RF characteristic impedance of the signal’s send and return conductors, digital or analogue waveforms of any practical bandwidth can be communicated whilst maintaining their fidelity, and the interconnection path prevented from resonating.
Routing
The routing of the copper traces on a PCB influences how well they couple electromagnetically to other traces and devices on the same PCB – and also to how well they couple to the conductors and devices (such as EMC testing antennas) in the world outside the PCB.
No traces should ever be routed near to the edge of – or across gaps, holes or splits in – a 0V plane. Also, transmission line traces should never be routed across edges or gaps, holes or splits in power planes.
Some types of signals require traces that do not change layers (except at their ends) and some should be routed between planes and not on the surface of a PCB.
Layer stack-ups
The ordering of the layers (0V planes, power planes, signals) in a PCB is very important. Some types of signal trace are best kept on inner layers, sandwiched between two planes. There should generally be at least one 0V-power plane pair for decoupling. Some signal traces need to be separated from other traces by a 0V or power plane.
Any PCB stack-up with less than eight layers cannot satisfy all of the PCB design-for-EMC principles simultaneously, and so is a compromise. However, for analogue circuits even a two-layer PCB (one layer being a 0V plane) can be very effective at improving immunity; whereas many simple low-speed digital circuits are able to use four layer PCBs and achieve low-cost EMC.
Achieving very small spacings between traces and planes is becoming increasingly important. This requires the trace’s spacing from the plane to be less than the width of the trace.
The cost of the bare PCB is usually unimportant
The EMC design of the PCB is perhaps the most important issue in achieving lowest-cost EMC quickly. However, the resulting bare PCBs themselves will often not be the cheapest.
Many companies still persist in thinking that the most profitable product is the one made from the cheapest components, so they omit EMC considerations from the design of their PCBs if they would have increased the bare-board cost. Unfortunately, this approach generally leads to many costly and time-consuming iterations during development, and to a final product which needs to employ more costly filtering and shielding than it would if its PCB had been designed properly for EMC in the first place.
In other words – skimping on the application of PCB EMC techniques is a false economy |
